The assessment of Nano-Architectures

This thesis is about the nanotechnology for a design of electronic reconfigurable logic circuits. The first part deals with the analysis of novel fabrication methods and nano-devices. In the second part, the development of neuro-inspired architecture is described in the context of nano-electronic circuits. At last, the defect tolerance of the architecture is assessed by functional simulations which showed the entire feasibility of such circuit through learning process.